Faculty Lineup

1.Material growth and device characteeristics of AlGaN/GaN single-heterostructure and AlGaN/GaN/AlGaN double-heterostructure field effect transistors on Si substrates, Y.L. Hsiao, C.A. Chang, E.Y. Chang, J.S. Maa, C.T. Chang, Y.J. Wang, Y.C. Weng, Applied Physics Express 7, 055501, 2014
2.Low resistance copper-based ohmic contact for AlGaN/GaN high electron mobility transistors, Y.Y. Wong, Y.K. Chen, J.S. Maa, H.W. Yu, Y.Y. Tu, C.F. Dee, C.C. Yap, E.Y. Chang, Appl. Phys. Lett. 103, 152104, 2013
3.Effect of Graded AlxGa1-xN Layers on the Properties of GaN Grown on Patterned Si Substrates, Yu-Lin Hsiao, Lung-Chi Lu, Edward Yi Chang, Chien-I Kuo, Jer-shen Maa, Kung-Liang Lin, Tien-Tung Luong, Wei-Ching Huang, Chia-Hua Chang, Chang Fu Dee, and Burhanuddin Yeop Majlis, Jpn. J. Appl. Phys. 51 (2012) 025505
4.High quality Ge thin film grown by ultrahigh vacuum chemical vapor deposition on GaAs substrate, Shih-Hsuan Tang, Edward Yi Chang, Mantu Hudait, Jer-Shen Maa, Chee-Wee Liu, Guang-Li Luo, Hai-Dang Trinh, and Yung-Hsuan Su, Appl. Phys. Lett. 98, 161905 (2011)

5.MOVPE high quality GaN film grown on Si (111) Substrates using an Multilayer AlN buffer, Kung-Liang Lin, Edward-Yi Chang, Jui-Chien Huang, Wei-Ching Huang, Yu-Lin Hsiao, Tingkai Li, Doug Tweet, Sheng Teng Hsu, Jer-shen Maa, Physic state solid (c), 5, 1536-1538, 2008

6.“Dislocation reduction in GaN film using Ga-lean GaN buffer layer and migration enhanced epitaxy” , Yuen-Yee Wong, Edward Yi Chang, Yue-Han Wu, Mantu K. Hudait, Tsung-Hsi Yang, Jet-Rung Chang, Jui-Tai Ku, Wu-Ching Chou, Chiang-Yao Chen, Jer-Shen Maa, Yueh-Chin Lin, Thin Solid Films, 519, 2011, 6208

7.Growth of GaN film on 150mm Si (111) using multilayer AlN/AlGaN buffer by metal-organic vapor phase epitaxy method, Kung-Liang Lin, Edward-Yi Chang, Yu-Lin Hsiao, Wei-Ching Huang, Tingkai Li, Doug Tweet, Jer-shen Maa, Sheng-Teng Hsu, Ching-Ting Lee,, Appl. Phys. Lett. 91, article222111, 2007.

8.Characterization and Reduction of Twist in Ge-on-insulator Produced by Localized Liquid Phase Epitaxy, D.J. Tweet, J.J. Lee, J.S. Maa, and S.T. Hsu, Appl. Phys. Lett., 87, article141908, 2005.

9.Strained Silicon Thin-Film Transistors Fabricated on Glass, J.J. Lee, J.S. Maa, D.J. Tweet, and S.T. Hsu, Appl. Phys. Lett, 86, 3504, 2005.

10. Relaxation of Strained SiGe on Insulator by Direct Wafer Bonding, J.S. Maa, J.J. Lee, D.Tweet, and S.T. Hsu, Mat. Res. Soc. Sypm. Proc., 809, B8.22.1, 2004.

11.Fabrication of Thin Relaxed SiGe Films for Strained Si Applications, D. Tweet, J.S. Maa, J.J. Lee and S.T. Hsu, Electrochem Soc. Proc. SiGe: Materials, Processing, and Devices, 2004-07, 865, 2004.

12.Relaxation of SiGe Films for the Fabrication of Strained Si Devices, with D.J. Tweet, J.J. Lee, S.T. Hsu, K. Fuji, T. Naka, T. Ueda, T. Baba, N. Awaya, and K. Sakiyama, Mat. Res. Soc. Symp. Proc., 768, 3, 2003.

13.Deposition and Properties of Spin-on Pb5Ge3O11 Ferroelectric Thin Film, F. Zhang, W. Zhuang, J.S. Maa, and S.T. Hsu, Integrated Ferroelectrics, 39, 1111, 2001.

14.Integration and Characterization of MFISFET Using Pb5Ge3O11, F.Y. Zhang, S.T. Hsu, Y. Ono, W.W. Zhuang, B. Ulrich, H. Ying, L. Stecker, D. Evans, and J.S. Maa, Integrated Ferroelectrics, 40, 1543, 2001.

15.PGO Spin-coating Precursor Synthesis, W.W. Zhuang, F.Y. Zhang, J.S. Maa and S.T. Hsu, Integrated Ferroelectrics, 36, 235, 2001.

16.Fabrication and Characterization of a Pb5Ge3O11 One-Transistor-Memory Device, T.K. Li, S.T. Hsu, B. Ulrich, H. Ying, L. Stecker, D. Evans, Y. Ono, J.S. Maa, and J.J. Lee, Appl. Phys. Lett., 79, 1661, 2001.

17.Fabrication and Characterization of Sub-micron Metal-Ferroelectric-Insulator-Semiconductor Field Effect Transistors with Pt/Pb5Ge3O11/ZrO2/Si Structure, F.Y. Zhang, S.T. Hsu, Y. Ono, B. Ulrich, W.W. Zhuang, H. Ying, L. Stecker, D.R. evans, and J.S. Maa, J. J. Appl. Phys., 40, L635, 2001.

18.The Effect of Al Interlayer on TiSi2 Formation, A. Kishi, T. Doi, S. Ohnisi, N. Awaya, K. Iguchi, K. Sakiyama, J.S. Maa, and S.T. Hsu, J.J. Appl Phys., 40, 3933, 2001.

19.Effect of Temperature on Etch Rate of Iridium and Platium in CF4/O2, with H. Ying and F.Y. Zhang, J. Vac. Sci. Technol., A19, 1312, 2001.

20.Plasma Etching of Lead Germanate (PGO) Ferroelectric Thin Film, H. Ying, T.K. Li, J.S. Maa, F.Y. Zhang, S.T. Hsu, Y.F. Gao, and M. Engelhard, J. Vac. Sci. Technol., A19, 1341, 2001.

21.Effect of Interlayer on Thermal Stability of Nickel Silicide, with Y. Ono, D.J. Tweet, F.Y. Zhang, and S.T. Hsu, J. Vac. Sci. Technol., A19, 1595, 2001.

22.Studies of Ir-Ta-O as High Temperature Stable Electrode material and Its Application for Ferroelectric SrBi2Ta2O9 Thin Film Deposition, J.J. Appl. Phys., 38, L1447, 1999.

23.Selectivity to Nitride in Chemical Vapor Deposition if Titanium Silicide, with D.J. Howard, S.S. He, D.J. Tweet, L. Stecker, G. Stecker, and S.T. Hsu, J. Vac. Sci. Technol., B17, 2243, 1999.

24.Prevention of Corner Voiding in Selective CVD of Titanium Silicide on SOI Device, with B. Ulrich, L. Stecker, G. Stecker, and S. T. Hsu, Mat. Res. Soc. Symp. Proc. 564, 29, 1999.

25.Effect of Selective CVD of Titanium Disilicide by Substrate Doping and Selective Silicon Deposition, with D.J. Howard, Mat. Res. Soc. Symp. Proc. 564, 85, 1999.

26.Selective Deposition of TiSi2 on Ultra-thin Silicon-on-Insulator (SOI) Wafers, with B. Ulrich, S.T. Hsu, and G. Stecker, Thin Solid Films, 332, 412, 1998.

27.Raised Source and Drain Structure of Poly-Si TFTs, S. He and J.S. Maa, Electrochem Society Proc.: Thin Film Transistors Technologies IV, 98-22, 204, 1998.

28.Edge Leakage of Cobalt Silicided Shallow Junctions, with C.-H. Peng and S.T. Hsu, Thin Solid Films, 308, 575, 1997.

29. Reaction of Amorphous Si with Cobalt Silicide for Reducing Si Consumption in SIMOX, with S.T. Hsu, B. Ulrich, and C.-H. Peng, Thin Solid Films, 308, 570, 1997.

30. Effect of Ar Ion Bombardment on the Stability of Narrow Cobalt Silicide/Polysilicon Structure, with C.-H. peng, Mat. Res. Soc. Sypm. Proc. 438, 301, 1997.

31. Reaction of Amorphous Si with Cobalt and Nickel Silicide before Disilicide Formation, with S.T. Hsu, Mat. Res. Soc. Sypm. Proc., 402, 185, 1996.

32. Monitoring of Highly Selective Plasma Etch Processes, with L. Allen, D. Evans, T.Z. Hsieh, B. Ulrich, S.T. Hsu, and J. Grant, SPIE Proceedings, 2334, 70, 1994.

33. Formation of Titanium Silicide on Ultrathin SOI, 1994 VLSI Multilevel Interconnection Conference (VMIC) Proc., p 484.

34. Anosotropic Etching of Polysilicon in Single Wafer Aluminum Etch Reactor, with H. Gossenberger and F. DiGeronimo, J. Vac. Sci. Technol., B9, 1596, 1991.

35. Effect of Post-Etch Treatment on Chlorine Concentration of AlSi and Ti Capped AlSi Films, with H. Gossenberger and R. Paff, J. Vac. Sci. Technol., B8, 1052, 1990.

36. Effect on Sidewall Profile of Si Etched in BCl3/Cl2 chemistry, with H. Gossenberger and L. Hammer, J. Vac. Sci. Technol., B8, 581, 1990.

37. Cross-sectional Transmission Electron Microscopy Study of the Structure of Titanium Diffusion Barriers on (100) Silicon, with J. McGinn and C. Buiocchi, Mat. Sci. and Eng., A111, 177, 1989.

38. Reflectivity Reduction by Oxygen Plasma Treatment of Capped Metallization Layer, with D. Meyerhofer, J. O'Neill, Jr., L. white, and P. Zanzucchi, J. Vac. Sci. Technol., B7, 145, 1989.

39. Surface Passivation by Adding Fluorocarbons and Chlorofluorocarbons onto an Al Dry Etch Reactor, J. Vac. Sci. Technol., B5, 652, 1987.

40. Anisotropic Dry Etching of Aluminum Films Deposited on Topographic Steps, with B. Halon, Mat. Res. Soc. Sypm. Proc., 68, 59, 1986.

41. The Residue Phenomenon in the Anisotropic Dry Etching of Conductive Films Deposited on Topographic Steps, with B. Halon, J. Vac. Sci. Technol., B4, 822, 1986.

42. Barrier Height Measurements of Tantalum Silicide on Silicon, with S. Hsu, RCA Review, 46, 163, 1985.

43. Etch rate enhancement of Si in CF4-O2 Plasmas, with L. White, Appl. Phys. Lett., 46, 1050, 1985.

44. On the Rapid Heat Lamp Annealing of Tantalum Silicide/Silicon Films, with R. Smith, J. McGinn, and L. Reed, Mat. Lett., 3, 314, 1985.

45. Preparation of Surfaces for High Quality Interface Formation, with J. Vossen, J. Thomas, and J. O'Neill, Jr., J. Vac. Sci. Technol., A2, 212, 1984.

46. Reactive Ion Etching of Al and al-Si Films with CCl4, N2, and BCl3 Mixtures, with J. O'Neill, Jr., J. Vac. Sci. Technol., A1, 212, 1983.

47. Phosphorus Out-Diffusion from Double-Layered Tantalum Silicide/Polycrystalline Silicon Structure, with C. Magee and J. O'Neill, Jr., J. Vac. Sci. Technol., B1, 1, 1983.

48. A System for In-Situ Studies of Plasma Surface Interactions Using X-ray Photoelectron Spectroscopy, with J. Vossen, J. Thomas, O. Mesker, and G. Fowler, J. Vac. Sci. Technol., 1, 1452, 1983

49. An X-ray Photoelectron Spectroscopy Study of the Surface Chemistry of Freon-Oxygen Plasma Etched Silicon, with J. Thomas, Appl. Phys. Lett., 43, 859, 1983.

50. Refractory Metal Silicide/N+ Polysilicon in CMOS/SOS, with B. Leung, IEDM Technical Digest, p. 827, 1980.

51. On the Preparation of CuInS2 Thin Films by Flash Evaporation, with H.L. Hwang, C.C. Tu, and C.Y. Sun, Solar Energy materials, 2, 433, 1980.

52. Backscattering Analysis of the Successive layer Structures of Titanium Silicides (Ti-Si and Ti-SiO2 Systems), with C.J. Lin, J.H. Liu, and Y.C. Liu, Thin Solid Films, 64, 439, 1979.

53. Low Temperature Crystallization of Amorphous Si Films in Contact with Thin Al Films, with S.J. Lin, Thin Solid Films, 64, 63, 1979.

54. Backscattering Analysis of the Layered Structure of Titanium Silicides (Ti-Si System), with Y.C. Liu and C.J. Lin, J. J. Appl. Phys., 18, 501, 1979.

55. Low Temperature Crystallization of Amorphous Si Films, with S.J. Lin, Chinese J. Mat. Sci., 10, 35, 1978.

56. Structure of Chemically Sprayed CdS Films Produced by Centrifugal Disk Atomizer, with T. Huang, Surface Technology, 7, 479, 1978.

57. Use of Centrifugal Disk Atomizer to Produce CdS Films, with T.L. Huang, M.F. Sung, Y. Chang, and S.C. Chiue, Rev. Sci. Instrum., 49, 1359, 1978.

58. Backscattering Analysis of Impurities in the Ion Beams, with Y.C. Liu, C.F. Chou, and W.S. Hsu, Nuclear Instruments and Methods, 152, 349, 1978.

59. Contamination Layers Formed by Helium Ion Bombardment, with W.S. Hsu, Y.C. Chang, and Y.C. Liu, Chinese Journal of Physics, 15, 279, 1977.

60. Elimination of the 16O2+ Effect of Backscattering Studies of Thin Film Reactions, with Y.C. Liu and C.F. Chou, Thin Solid Films, 47, L5, 1977.

61.Early Growth of Sputtered Thin films, with T.E. Hutchinson, J. Vac. Sci. Technol., 14, 116, 1977.

62.Direct Observations of the Growth of Sputtered Au Films on (111) Si substrates (UHV Electron Microscope Observation), with J.I. Lee and T.E. Hutchinson, 34th Annual Proc. EMSA, 650, 1976.

63.Direct Observations of the Growth of Sputtered Ag on Substrates of Graphite and Muscovite Mica, with J.I. Lee and T.E. Hutchinson, 34th Annual Proc. EMSA, 648, 1976.

64.Direct Observations of the Growth of sputtered Ag and Au on (111) Si substrates, with J.I. Lee and T.E. Hutchinson, J. Vac. Sci Technol., 11, 136, 1974.

65.Direct Observations of the Epitaxial Growth of Sputtered Ag on Si, with T.E. Hutchinson, 31th Annual Proc. EMSA, 122, 1973.

66.Preparation of Thin Single Crystal Silicon substrates for In-situ Electron Microscope Studies, with J. I. Lee and T. E. Hutchinson, 31th Annual proc. EMSA, 120, 1973.

67.Observations of Sputtered Thin Film Growth, with D.M. Sherman and T.E. Hutchinson, J. Vac. Sci. Technol., 10, 155, 1973.

68.Fabrication of Strained Silicon on Insulator (SSOI) by Direct Wafer Bonding Using Thin Relaxed SiGe Film as Virtual Substrate, J.J. Lee, J.S. Maa, D.J. Tweet, and S.T. Hsu, Mat. Res. Soc. Sypm. Proc., 809, B2.2.1, 2004.

69. Intermetallic compound formation in Ta-Al and Ta-Au thin films, J. Liaw, Y. Liu, J.S. Maa, W. Shiung, W. Shen and S. Hsiung, Chinese Journal of Materials Science,12, 34, 1980.

1. Metal oxide semiconductor thin film transistors , US Patent 8513720, G.S. Herman, J. S. Maa, K. Puntambekar, A.T. Voutsas, 2013/8/20

2. Solution process for fabricating a textured transparent conductive oxide (TCO), US Patent 8404302, J.S. Maa, G.S. Herman, A.T. Voutsas, 2013/3/26

3. Germanium film optical device, US Patent 8106473, J.J. Lee, S.R. Droes, J.W. Hartzell, J.S. Maa, 2012/1/31

4. Germanium film optical device fabricated on a glass substrate, US Patent 7927909, J.J. Lee, S.R. Droes, J.W. Hartzell, J.S. Maa, 2011/4/1

5. Ge imager for short wavelength infrared, US Patent 7906825, D.J.Tweet, J.S.Maa, J.J.Lee,S.T.Hsu, 2011/3/15

6. CMOS active pixel sensor, US Patent 7800148, J.J.Lee,S.T.Hsu,D.J.Tweet,J.S.Maa, 2010/9/21

7. Method of fabricating a low dark-current germanium-on-silicon pin photo detector, US Patent 7811913, J.J.Lee,D.J.Tweet,J.S.Maa,S.T.Hsu, 2010/10/12

8. Thermal sensor with a silicon/germanium superlattice structure, US Patent 7786469, J.S.Maa,J.Jang,J.J.Lee,D.J.Tweet,S.T.Hsu, 2010/8/31

9. Germanium phototransistor with floating body, US Patent 7675056, J.J.Lee,S.T.Hsu,J.S.Maa,D.J.Tweet, 2010/3/9

10. Ge short wavelength infrared imager, US Patent 7651880, D.J.Tweet,J.S.Maa,J.J.Lee,S.T.Hsu, 2010/1/26

11. Gallium nitride on silicon interface using multiple aluminum compound buffer layers, US Patent 7598108, T.K.Li,J.Tweet,J.S.Maa,S.T.Hsu, 2009/10/6

12. Patterned silicon submicron tubes, US Patent 7,514,282, Li; Tingkai, Lee; Jong-Jan, Maa; Jer-Shen, Hsu; Sheng Teng, April 7, 2009

13. Method of making CMOS devices on strained silicon on glass, US Patent 7,470,573, Lee; Jong-Jan, Maa; Jer-Shen, Tweet; Douglas J., Ono; Yoshi, Hsu; Sheng Teng, December 30, 2008

14. Transfer method for forming a silicon-on-plastic wafer, US Patent 7,459,375, Maa; Jer-Shen, Lee; Jong-Jan, Tweet; Douglas J., Hsu; Sheng Teng, December 2, 2008

15. Silicon/germanium superlattice thermal sensor, US Patent 7,442,599, Maa; Jer-Shen, Tang; Jinke, Lee; Jong-Jan, Tweet; Douglas J., Hsu; Sheng Teng, October 28, 2008

16. Real-time CMOS imager having stacked photodiodes fabricated on SOI wafer , US Patent 7,419,844, Lee; Jong-Jan, Hsu; Sheng Teng, Tweet; Douglas J., Maa; Jer-Shen, September 2, 2008

17. Method of growing a germanium epitaxial film on insulator for use in fabrication of CMOS integrated circuit , US Patent 7,413,939, Hsu; Sheng Teng, Lee; Jong-Jan, Maa; Jer-Shen, Tweet; Douglas J. August 19, 2008

18. Smooth surface liquid phase epitaxial germanium, US Patent 7,405,098, Lee; Jong-Jan, Maa; Jer-Shen, Tweet; Douglas J., Evans; David R., Burmaster; Allen, July 29, 2008

19. Strained silicon on insulator from film transfer and relaxation by hydrogen implantation, US Patent 7,390,725, Maa; Jer-shen, Lee; Jong-Jan, Tweet; Douglas J., Evans; David R., Burmaster; Allen W., Hsu; Sheng Teng, June 24, 2008

20. Method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications, US Patent 7,384,837, Hsu; Sheng Teng , Lee; Jong-Jan , Tweet; Douglas J. , Maa; Jer-shen, June 10, 2008

21. Method of fabricating local interconnects on a silicon-germanium 3D CMOS, US Patent 7,378,309, Lee; Jong-Jan , Schuele; Paul J., Hsu; Sheng Teng , Maa; Jer-Shen, May 27, 2008

22. Single-crystal silicon-on-glass from film transfer, US Patent 7,361,574, Maa; Jer-Shen , Evans; David R., Lee; Jong-Jan , Tweet; Douglas J. , Hsu; Sheng Teng, April 22, 2008

23. Germanium infrared sensor for CMOS imagers, US Patent 7,361,528, Lee; Jong-Jan , Maa; Jer-Shen , Hsu; Sheng Teng , Tweet; Douglas J., April 22, 2008

24. Germanium photo detector having planar surface through germanium epitaxial overgrowth, 7,361,526, Maa; Jer-Shen , Lee; Jong-Jan , Hsu; Sheng Teng , Tweet; Douglas J.., April 22, 2008

25. Method of fabricating a germanium photo detector on a high quality germanium epitaxial overgrowth layer, US Patent 7,358,107, Maa; Jer-Shen , Lee; Jong-Jan , Hsu; Sheng Teng , Tweet; Douglas J., April 15, 2008

26. Floating body germanium phototransistor having a photo absorption threshold bias region, US Patent 7,351,995, Hsu; Sheng Teng , Lee; Jong-Jan , Maa; Jer-Shen , Tweet; Douglas J., April 1, 2008

27. Self-aligned cross point resistor memory array, US Patent 7,323,349, Hsu; Sheng Teng , Lee; Jong-Jan , Maa; Jer-Shen , Tweet; Douglas J. , Zhuang; Wei-Wei, January 29, 2008

28. Fabrication of vertical sidewalls on (110) silicon substrates for use in Si/SiGe photodetectors, US Patent 7,297,564, Tweet; Douglas J. , Lee; Jong-Jan , Maa; Jer-Shen , Hsu; Sheng Teng, November 20, 2007

29. Method of fabricating single-layer and multi-layer single crystalline silicon and silicon devices on plastic using sacrificial glass, US Patent 7,279,400, Maa; Jer-Shen , Lee; Jong-Jan , Tweet; Douglas J. , Hsu; Sheng Teng, October 9, 2007

30. Floating body germanium phototransistor with photo absorption threshold bias region, US Patent 7,276,392, Hsu; Sheng Teng , Lee; Jong-Jan , Maa; Jer-Shen , Tweet; Douglas J., October 2, 2007

31. Floating body germanium phototransistor, US Patent 7,271,023, Lee; Jong-Jan , Hsu; Sheng Teng , Maa; Jer-Shen , Tweet; Douglas J., September 18, 2007

32. Iridium etching for FeRAM applications, US Patent 7,267,996, Zhang; Fengyan , Evans; David R., Pan; Wei , Stecker; Lisa H. , Maa; Jer-Shen, September 11, 2007

33. Method of fabricating silicon on glass via layer transfer, US Patent 7,265,030, Maa; Jer-Shen , Lee; Jong-Jan , Tweet; Douglas J. , Hsu; Sheng Teng, September 4, 2007

34. Fabrication of a low defect germanium film by direct wafer bonding, US Patent 7,247,545, July 24, 2007

35. Method to form relaxed SiGe layer with high Ge content using co-implantation of silicon with boron or helium and hydrogen, US Patent 7,241,670, Tweet; Douglas J. , Evans; David R., Hsu; Sheng Teng , Maa; Jer-Shen, July 10, 2007

36. Method to form thick relaxed SiGe layer with trench structure, US Patent 7,226,504, June 5, 2007

37. High-density germanium-on-insulator photodiode array, 7,186,611, Hsu; Sheng Teng , Lee; Jong-Jan , Maa; Jer-Shen , Tweet; Douglas J., March 6, 2007

38. Strained silicon devices transfer to glass for display applications, US Patent 7,176,072, Lee; Jong-Jan , Maa; Jer-Shen , Hsu; Sheng Teng, February 13, 2007

39. Fabrication of thin film germanium infrared sensor by bonding to silicon wafer, US Patent 7,157,300, Lee; Jong-Jan , Maa; Jer-Shen , Hsu; Sheng Teng , Tweet; Douglas J., January 2, 2007

40. Integration of biaxial tensile strained NMOS and uniaxial compressive strained PMOS on the same wafer, US Patent 7,138,309, Lee; Jong-Jan , Maa; Jer-Shen , Tweet; Douglas J. , Hsu; Sheng Teng, November 21, 2006

41. Surface-normal optical path structure for infrared photodetection, US Patent 7,129,488, Lee; Jong Jan , Maa; Jer-Shen , Tweet; Douglas J. , Hsu; Sheng Teng, October 31, 2006

42. Strained silicon fin structure, US Patent 7,115,945, Lee; Jong-Jan , Hsu; Sheng Teng , Tweet; Douglas J. , Maa; Jer-Shen, October 3, 2006

43. Method of fabricating silicon integrated circuit on glass, US Patent 7,071,042, Maa; Jer-Shen , Hsu; Sheng Teng , Lee; Jong-Jan , Tweet; Douglas J., July 4, 2006

44. Method of making relaxed silicon-germanium on insulator via layer transfer with stress reduction, US Patent 7,067,430, Maa; Jer-Shen , Lee; Jong-Jan , Tweet; Douglas J. , Hsu; Sheng Teng, June 27, 2006

45. Vertical optical path structure for infrared photodetection, US Patent 7,045,832, Tweet; Douglas J. , Lee; Jong-Jan , Maa; Jer-Shen , Hsu; Sheng Teng, May 16, 2006

46. Strained silicon finFET device, US Patent 7,045,401, Lee; Jong-Jan , Hsu; Sheng Teng , Tweet; Douglas J. , Maa; Jer-Shen, May 16, 2006

47. Method of fabricating a low-defect strained epitaxial germanium film on silicon, US Patent 7,037,856, Maa; Jer-Shen , Tweet; Douglas J. , Lee; Jong-Jan , Hsu; Sheng Teng, May 2, 2006

48. Low temperature anneal to reduce defects in hydrogen-implanted, relaxed SiGe layer, US Patent 7,030,002, Tweet; Douglas J. , Lee; Jong-Jan , Maa; Jer-Shen, April 18, 2006

49. Method to form local "silicon-on-nothing" or "silicon-on-insulator" wafers with tensile-strained silicon, US Patent 7,018,882, Tweet; Douglas J. , Hsu; Sheng Teng , Maa; Jer-Shen, March 28, 2006

50. Epitaxial growth of germanium photodetector for CMOS imagers, US Patent 7,008,813, Lee; Jong-Jan , Maa; Jer-Shen , Tweet; Douglas J. , Hsu; Sheng Teng, March 7, 2006

51. Integrated circuit structure including electrodes with PGO ferroelectric thin film thereon, US Patent 6,998,661, Zhang; Fengyan , Maa; Jer-Shen , Zhuang; Wei-Wei , Hsu; Sheng Teng, February 14, 2006

52. Strained silicon on insulator from film transfer and relaxation by hydrogen implantation, US Patent 6,992,025, Maa; Jer-shen , Lee; Jong-Jan , Tweet; Douglas J. , Evans; David R., Burmaster; Allen W. , Hsu; Sheng Teng, January 31, 2006

53. Three-dimensional quantum dot structure for infrared photodetection, US Patent 6,967,112, Maa; Jer-Shen , Lee; Jong-Jan , Tweet; Douglas J. , Hsu; Sheng Teng, November 22, 2005

54. System and method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications, US Patent 6,903,384, Hsu; Sheng Teng , Lee; Jong-Jan , Tweet; Douglas J. , Maa; Jer-shen, June 7, 2005

55. Method of making relaxed silicon-germanium on glass via layer transfer, US Patent 6,852,652, Maa; Jer-Shen , Lee; Jong-Jan , Tweet; Douglas J. , Droes; Steve Roy, February 8, 2005

56. Method for recrystallizing an amorphized silicon germanium film overlying silicon, US Patent 6,793,731, Hsu; Sheng Teng , Lee; Jong-Jan , Maa; Jer-shen , Tweet; Douglas J., September 21, 2004

57. Method of forming relaxed SiGe layer, US Patent 6,780,796, Maa; Jer-Shen , Lee; Jong-Jan , Tweet; Douglas J. , Hsu; Sheng Teng, August 24, 2004

58. Method of fabricating deep sub-micron CMOS source/drain with MDD and selective CVD silicide, US Patent 6,780,700, Iguchi; Katsuji (Nara, JP), Hsu; Sheng Teng , Ono; Yoshi , Maa; Jer-shen, August 24, 2004

59. Method of barrier metal surface treatment prior to Cu deposition to improve adhesion and trench filling characteristics, US Patent 6,777,327, Pan; Wei , Maa; Jer-Shen , Evans; David R., Hsu; Sheng Teng, August 17, 2004

60. Methods of making relaxed silicon-germanium on insulator via layer transfer, US Patent 6,767,802, Maa; Jer-Shen , Lee; Jong-Jan , Tweet; Douglas J. , Hsu; Sheng Teng, July 27, 2004

61. Method to form relaxed sige layer with high ge content, US Patent 6,746,902, Maa; Jer-Shen , Tweet; Douglas James , Hsu; Sheng Teng, June 8, 2004

62. Method of fabricating a nickel silicide on a substrate, US Patent 6,720,258, Maa; Jer-shen , Tweet; Douglas J. , Ono; Yoshi , Zhang; Fengyan , Hsu; Sheng Teng, April 13, 2004

63. Implantation at elevated temperatures for amorphization re-crystallization of Si1-xGex films on silicon substrates, US Patent 6,703,293, Tweet; Douglas J. , Hsu; Sheng Teng , Maa; Jer-shen , Lee; Jong-Jan, March 9, 2004

64. Method for amorphization re-crystallization of Si1-xGex films on silicon substrates, US Patent 6,699,764, Tweet; Douglas J. , Maa; Jer-shen , Lee; Jong-Jan , Hsu; Sheng Teng, March 2, 2004

65. Iridium conductive electrode/barrier structure and method for same, US Patent 6,682,995, Zhang; Fengyan , Maa; Jer-shen , Hsu; Sheng Teng, January 27, 2004

66. Thermally stable nickel germanosilicide formed on SiGe, US Patent 6,627,919, Maa; Jer-shen , Tweet; Douglas James , Hsu; Sheng Teng, September 30, 2003

67. Single c-axis PGO thin film electrodes having good surface smoothness and uniformity and methods for making the same, US Patent 6,586,260, Zhang; Fengyan , Maa; Jer-Shen , Zhuang; Wei-Wei , Hsu; Sheng Teng, July 1, 2003

68. Method of monitoring PGO spin-coating precursor solution synthesis using UV spectroscopy, US Patent 6,585,821, Zhuang; Wei-Wei , Zhang; Fengyan , Maa; Jer-shen , Hsu; Sheng Teng, July 1, 2003

69. Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation, US Patent 6,583,000, Hsu; Sheng Teng , Lee; Jong-Jan , Maa; Jer-shen , Tweet; Douglas James, June 24, 2003

70. Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content, US Patent 6,562,703, Maa; Jer-Shen , Tweet; Douglas J. , Hsu; Sheng Teng , Lee; Jong-Jan, May 13, 2003

71. Method of forming iridium conductive electrode/barrier structure, US Patent 6,555,456, Zhang; Fengyan , Maa; Jer-shen , Hsu; Sheng Teng, April 29, 2003

72. Method for plasma etching of Ir-Ta-O electrode and for post-etch cleaning, US Patent 6,541,385, Ying; Hong, Zhang; Fengyan , Maa; Jer-Shen , Hsu; Sheng Teng, April 1, 2003

73. Method of the synthesis and control of PGO spin-coating precursor solutions, US Patent 6,537,361, Zhuang; Wei-Wei , Zhang; Fengyan , Maa; Jer-Shen , Hsu; Sheng Teng, March 25, 2003

74. Device including an epitaxial nickel silicide on (100) Si or stable nickel silicide on amorphous Si and a method of fabricating the same, US Patent 6,534,871, Maa; Jer-shen , Tweet; Douglas J. , Ono; Yoshi , Zhang; Fengyan , Hsu; Sheng Teng, March 18, 2003

75. Method to form thermally stable nickel germanosilicide on SiGe, US Patent 6,506,637, Maa; Jer-shen , Tweet; Douglas James , Hsu; Sheng Teng, January 14, 2003

76. Iridium composite barrier structure and method for same, US Patent 6,479,304, Zhang; Fengyan , Maa; Jer-shen , Hsu; Sheng Teng, November 12, 2002

77. Nickel silicide including iridium for use in ultra-shallow junctions with high thermal stability and method of manufacturing the same, US Patent 6,468,901, Maa; Jer-shen , Ono; Yoshi , Zhang; Fengyan, October 22, 2002

78. Ferroelectric nonvolatile transistor, US Patent 6,462,366, Hsu; Sheng Teng , Maa; Jer-shen , Zhang; Fengyan , Li; Tingkai, October 8, 2002

79. Single c-axis PGO thin film on ZrO2 for non-volatile memory applications and methods of making the same, US Patent 6,441,417, Zhang; Fengyan , Ma; Yanjun , Maa; Jer-Shen , Zhuang; Wei-Wei , Hsu; Sheng Teng, August 27, 2002

80. PGO solutions for the preparation of PGO thin films via spin coating, US Patent 6,372,034, Zhuang; Wei-Wei , Maa; Jer-shen , Zhang; Fengyan , Hsu; Sheng Teng, April 16, 2002

81. Double sidewall raised silicided source/drain CMOS transistor, US Patent 6,368,960, Hsu; Sheng Teng , Maa; Jer-Shen, April 9, 2002

82. Method for anisotropic plasma etching using non-chlorofluorocarbon, fluorine-based chemistry, US Patent 6,350,699, Maa; Jer-shen , Zhang; Fengyan, February 26, 2002

83. Nitride overhang structure for the silicidation of transistor electrodes with shallow junctions, US Patent 6,339,245, Maa; Jer-Shen , Hsu; Sheng Teng , Peng; Chien-Hsiung, January 15, 2002

84. MOCVD metal oxide for one transistor memory, US Patent 6,303,502, Hsu; Sheng Teng , Evans; David R., Li; Tingkai , Maa; Jer-shen , Zhuang; Wei-Wei, October 16, 2001

85. Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier, US Patent 6,288,420, Zhang; Fengyan , Hsu; Sheng Teng , Maa; Jer-shen , Zhuang; Wei-Wei, September 11, 2001

86. Iridium composite barrier structure and method for same, US Patent 6,236,113, Zhang; Fengyan , Maa; Jer-shen , Hsu; Sheng Teng, May 22, 2001

87. MOS transistor having shallow source/drain junctions and low leakage current, US Patent 6,218,249, Maa; Jer-Shen , Hsu; Sheng Teng , Peng; Chien-Hsiung, April 17, 2001

88. Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier and method for same, US Patent 6,190,963, Zhang; Fengyan , Hsu; Sheng Teng , Maa; Jer-shen , Zhuang; Wei-Wei, February 20, 2001

89. Partial silicidation method to form shallow source/drain junctions, US Patent 6,071,782, Maa; Jer-Shen , Hsu; Sheng Teng , Peng; Chien-Hsiung, June 6, 2000

90. Ferroelectric nonvolatile transistor and method of making same, US Patent 6,048,740, Hsu; Sheng Teng , Maa; Jer-shen , Zhang; Fengyang , Li; Tingkai, April 11, 2000

91. Method for transferring a multi-level photoresist pattern, US Patent 6,043,164, Nguyen; Tue , Hsu; Sheng Teng , Maa; Jer-shen , Ulrich; Bruce Dale, Peng; Chien-Hsiung, March 28, 2000

92. Nitride overhang structures for the silicidation of transistor electrodes with shallow junction, US Patent 5,989,965, Maa; Jer-Shen , Hsu; Sheng Teng , Peng; Chien-Hsiung, November 23, 1999

93. Rapid thermal annealing with absorptive layers for thin film transistors on transparent substrates, US Patent 5,950,078, Maekawa; Masashi , Maa; Jer-shen, September 7, 1999

94. Method for a chemical vapor deposition of copper on an ion prepared conductive surface, US Patent 5,918,150, Nguyen; Tue , Maa; Jer-Shen
95. Raised silicided source/drain electrode formation with reduced substrate silicon consumption, US Patent 5,830,775, Maa; Jer-shen , Hsu; Shen Teng, November 3, 1998

96. Method of forming transistor electrodes from directionally deposited silicide, US Patent 5,814,537, Maa; Jer-shen , Hsu; Sheng Teng, September 29, 1998

97. Low reflectance conductor in an integrated circuit, US Patent 4,990,995, Maa; Jer-shen, February 5, 1991
98. Formation of submicrometer lines, US Patent 4,648,939, Maa; Jer-shen, Huang; Sheng M, March 10, 1987

99. Method of detecting alkali metal ions, US Patent 4,609,447, White; Lawrence K., Maa; Jen-shen, September 2, 1986

100. Formation of conductive lines, US Patent 4,585,515, Maa; Jer-shen, April 29, 1986
101. Anisotropic etching of aluminum, US Patent 4,547,261, Maa; Jer-shen, Halon; Bernard, October 15, 1985

102. Patterning of submicrometer metal silicide structures, US Patent 4,460,435, Maa; Jer-shen, July 17, 1984

103. Etching of tantalum silicide/doped polysilicon structures, US Patent 4,411,734, Maa; Jer-shen, October 25, 1983